Programmable I/O Expander and USART (TDS601)
TDS601 is high speed multipurpose programmable I/O-Expander with built-in three USART for data-transmission. TDS601 have one set of 4bit input/output ports and seven sets of maximum 8bit input/output ports.
TDS601 has synchronous/asynchronous receiver-transmitter circuit (USART) built-in, and programmable input-output interface LSI.
TDS601 operate at "3.3V" or "5V" single supply voltage. It is ideal for use high speed CPU (8bit/16bit).
CPU Bus Interface
→ Directly connection to 80-series or 68-series CPU is possible.
→ Selection of serial bus and parallel bus is possible.
→ Expansion of input-output of maximum-60bit is possible.
→ Input/output setting of each bit is possible.
→ Setting of quasi-N-channel open-drain function is possible.
→ Writing output-data is possible in input-mode.
→ Reading state of output-pin is possible.
→ Using of maximum three systems is possible.(USART1,USART2,USART3).
→ Each 16byte transmitting/receiving FIFO-data-buffer built-in (only USART1).
→ Prescaler built-in (each USART, 4bit-programmable).
→ Baud-rate-generator built-in (each USART, 8bit-programmable).
→ Data format of transmitting/receiving.
→ Data length fixation 8bit.
→ Start-bit 1bit.
→ Data length 5bit/6bit/7bit/8bit/9bit.
→ Parity-bit odd number/even number/none.
→ Stop-bit 1bit/2bit
→ Asynchronous transmission (UART) of IrDA-data-type is possible.
→ Programmable setting of interrupt signal source is possible.
→ Tac (NRD-D) = 40ns (CL=100pF case-5v)