[6+ Years of relevant experience]
Custom Layout Design to execute Full Chip, Block and
sub-block level from circuit schematics.
- Independent Handling and Full Chip Layout Design of various Chips like Analog PHY, SerDes, Transceivers, ROICs, etc., and various Mixed Signal blocks and sub-blocks of PLLs, CDRs, LVDS, HDMI, Serial I/Os, and other building blocks.
- Work independently, collaborating with Project Manager/Leader and design engineers.
- Responsible for the timely execution as well as overall physical design quality of the implemented circuits.
- Follow the Project Execution Plan, Project Schedule, Work Assignment and EDA tool usage plan.
- Mentor and Guide Junior members of the team.
Required Skillset / Qualifications in detail
- Diploma/BE/B.Tech/ME/M.Tech Degree in Electronics. .
- 6+ years of relevant experience in Analog Layout with prior tape-out experience.
- Hands on experience in doing layout of High Speed Interface circuits like LVDS, HDMI, Display Port; PLLs, CDRs; ADCs, DACs; Regulators etc. Full Chip layout experience is a must.
- Thorough Understanding of deep sub-micron, High Speed circuit layout, DFM issues and techniques.
- Must have worked on some of the Technologies like: 28nm, 40nm, 65nm, 90nm, 130nm, 0.18um, 0.25um CMOS, BiCMOS, SOI. Process etc. Experience of RF IC Layout or Power Circuits Layouts will be an added advantage.
- Must have done Successful Tape-outs under a lead role.
- Should have strong problem solving and debugging skills of LVS and other physical verification errors to ensure that the project schedules are in line with the requirements.
- Must have thorough working knowledge of CAD tools like Cadence Virtuoso-LE, Virtuoso-XL, Assura, Physical Verification System, Mentor Graphics Calibre.
- Should have knowledge of some of the scripting languages like perl, skill etc.
- Should have clear understanding of Calibre and Assura Rule Decks.- Strong team and interpersonal skills
- Excellent verbal, written, and presentation skills
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Send your Resume to firstname.lastname@example.org
Lead Engineer - Analog Mixed Signal and RF Layout
6+yrs Experience; Full Chip Layout of Analog PHYs, SerDes, I/Os, Data Converters, PLL, Baseband Circuits
Design Engineer - Analog Mixed Signal and RF Layout
3-6yrs Experience; Analog PHYs, SerDes, I/Os, Data Converters, PLL, Baseband Circuit
Fresh MTech/MS Graduates / Interns - Analog and RF Design
Fresh ME/MTech Graduates with specialization in Analog and RF Design.